clar200-unlock
Unlock two EMC/CLARiiON-locked Seagate Exos X18 SAS drives (ST16000NM004J, fw ES2264 — SN ZRS015V7, ZR511KWK) via the Seagate F3 service terminal, using an ESP32-C3 as a 3.3 V USB-serial bridge.
Goal: turn two 16 TB paperweights into healthy 512-byte-sector disks for the
tank ZFS pool, which is short on 14.6 TB+ spares (mirror-35 has a dead + a
dying leg; ex-mirror-38 is a bare single-disk vdev).
Why this exists
These drives answer SCSI INQUIRY/VPD but return Hardware Error / Internal target failure to every other command — including READ CAPACITY — so no
host-side tool (sg_format, openSeaChest, SeaChest, firmware download) can format
them. Full prior evidence: ~/bin/EMC_CLAR200_DRIVE_FIX_NOTES.md. The F3 UART
bypasses the SCSI layer; it's the only remaining DIY lever.
Layout
| Path | What |
|---|---|
PROCEDURE.md |
Start here — the physical + operational runbook (bench, wiring, flash, F3 entry, format, verify) |
firmware/clar200_bridge.ino |
ESP32-C3 transparent USB↔UART bridge sketch (live baud menu) |
firmware/flash.sh |
One-command build + flash from steel141 (/dev/ttyACM0) |
docs/f3-command-reference.md |
F3 dialect — confirmed vs. 7200.11-era-only; what to verify with ? |
IDEA.md / DECISIONS.md / CLAUDE.md |
project brief / decisions / Claude Code context |
Hardware (current)
- ESP32-C3 on steel141
/dev/ttyACM0(native USB-Serial-JTAG, 3.3 V, MAC58:8c:81:ac:f0:4c). 3.3 V is a native match for the F3 header — no separate USB-TTL adapter needed. - Target drive ZRS015V7 currently in a pve173 JBOD → must be benched for F3 work (never in-chassis next to live tank).
Quickstart
cd firmware && ./flash.sh /dev/ttyACM0 # build + flash the bridge
screen /dev/ttyACM0 115200 # open it; ~1/~2/~3/~4 set DRIVE baud
Then follow PROCEDURE.md from Step 2 (bench the drive).
Status
Bootstrapped 2026-06-14. Firmware + procedure written; not yet flashed, drive
not yet benched. See the latest .claude/handoffs/ entry.