docs: remove V100 from GPU bakeoff
V100 data was degraded by SDXL co-residence on CT 167 (31/32 GB VRAM occupied, Gemma 4 models forced 95% onto CPU). Rather than ship a prominent caveat, drop the V100 column entirely so the doc reports only apples-to-apples measurements. V100 can be added back once an isolated run is possible. Removed: V100 column from TL;DR and per-model tables, hardware row, caveat section, and associated raw JSONs under runs/pve197/. Harness config keeps pve197 in HOSTS for future re-runs. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This commit is contained in:
Mortdecai
@@ -1,7 +1,7 @@
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# GPU Bakeoff — Gemma 4 Throughput Across Three Architectures
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# GPU Bakeoff — Gemma 4 Throughput: 3090 Ti vs Strix Halo
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**Date:** 2026-04-20
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**Host matrix:** steel141 (RTX 3090 Ti) · pve197 CT 105 (Tesla V100) · matt-strix (AMD Strix Halo iGPU)
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**Host matrix:** steel141 (RTX 3090 Ti) · matt-strix (AMD Strix Halo iGPU)
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**Models:** `gemma4:26b` (MoE Q4_K_M) · `gemma4:31b-it-q4_K_M` (dense Q4_K_M)
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**Harness:** `scripts/gpu-bakeoff/harness.py`
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**Raw data:** `scripts/gpu-bakeoff/runs/`
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@@ -14,12 +14,6 @@
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|-----|------------------|--------------------|-----------------------|
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| **RTX 3090 Ti** (steel141) | **128 tok/s** | **27 tok/s** | **23,849 tok/s** |
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| **AMD Strix Halo iGPU** (matt-strix) | 54 tok/s (42%) | 11 tok/s (39%) | 14,326 tok/s (60%) |
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| **Tesla V100** (pve197) ⚠ | 8 tok/s (6%) | 1.6 tok/s (6%) | 2,696 tok/s (11%) |
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> ⚠ **V100 numbers reflect degraded conditions — SDXL on CT 167 occupies
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> 31.7 / 32.7 GB VRAM, forcing Ollama's Gemma 4 models 95% onto CPU.**
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> Under isolation, V100 should land between 3090 Ti and Strix based on
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> raw specs (HBM2 ~900 GB/s). See § "V100 caveat" for the evidence.
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### Headline findings
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@@ -33,10 +27,6 @@
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3. **Strix Halo punches above its bandwidth.** Gets 42 % of 3090 Ti
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decode speed on only ~25 % of the memory bandwidth (~256 GB/s vs
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~1008 GB/s) — good SIMD utilization, especially on the MoE model.
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4. **V100 is held back by shared VRAM.** Its spec should put it closer
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to 3090 Ti than to Strix, but coresident SDXL crowds out Ollama's
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layer offload. The V100 column in this doc is an *as-is* reading,
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not a *peak-capability* reading.
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---
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@@ -45,7 +35,6 @@
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| Host | GPU | VRAM | Bandwidth | Compute cap | Notes |
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|------|-----|------|-----------|-------------|-------|
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| steel141 | RTX 3090 Ti | 24 GB GDDR6X | ~1008 GB/s | 8.6 (Ampere) | Seth's workstation. Also has a GTX 1660 SUPER as aux display card — not used for inference. Ollama on 127.0.0.1:11434. |
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| pve197 CT 105 | Tesla V100-PCIE-32GB | 32 GB HBM2 | ~900 GB/s | 7.0 (Volta) | LXC with GPU passthrough. Ollama on 192.168.0.179:11434. **Coresident with CT 167 ai-visualizer (SDXL) which consumes most of the VRAM.** |
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| matt-strix | AMD Strix Halo (Radeon 890M iGPU + XDNA 2 NPU) | Shared LPDDR5X | ~256 GB/s | — | Unified memory lets it fit models a 24 GB card can't. Ollama on 100.117.155.64:11434 via Tailscale. |
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---
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@@ -65,10 +54,6 @@
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jitter are excluded from the rates.
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- Median of the 3 measurement runs is reported in tables; min/max are in
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the raw JSON.
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- **No network-introduced variance** — all three hosts exposed HTTP
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Ollama endpoints (matt-strix via Tailscale). The timings reported are
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computed server-side from `prompt_eval_count / prompt_eval_duration`
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and `eval_count / eval_duration`.
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---
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@@ -79,10 +64,10 @@
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Decode is the metric that matters most for interactive LLM use — it's
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the speed of token generation after the prompt has been processed.
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| Model | 3090 Ti | V100 ⚠ | Strix Halo |
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|-------|---------|-------|------------|
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| gemma4:26b (MoE, ~4 B active) | **128.20** | 8.34 | 53.86 |
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| gemma4:31b (dense, 31.3 B active) | **27.15** | 1.55 | 10.64 |
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| Model | 3090 Ti | Strix Halo |
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|-------|---------|------------|
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| gemma4:26b (MoE, ~4 B active) | **128.20** | 53.86 |
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| gemma4:31b (dense, 31.3 B active) | **27.15** | 10.64 |
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### Prefill rate (tok/s, long ~500-token prompt, median)
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@@ -91,52 +76,20 @@ before decode begins. Batched per-token, so short-prompt prefill numbers
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are noisy (dominated by fixed overhead — see raw JSON for those); the
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long-prompt numbers below are the ones to reason from.
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| Model | 3090 Ti | V100 ⚠ | Strix Halo |
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|-------|---------|-------|------------|
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| gemma4:26b (long) | **23,849** | 2,696 | 14,326 |
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| gemma4:31b (long) | **7,716** | 436 | 3,278 |
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| Model | 3090 Ti | Strix Halo |
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|-------|---------|------------|
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| gemma4:26b (long) | **23,849** | 14,326 |
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| gemma4:31b (long) | **7,716** | 3,278 |
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### Short-prompt prefill (for reference)
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On a 15-token prompt, prefill tokens/sec is meaningless — prompt is too
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small to amortize overhead. Included only to confirm no regression.
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| Model | 3090 Ti | V100 ⚠ | Strix Halo |
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|-------|---------|-------|------------|
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| gemma4:26b (short) | 2,063 | 240 | 1,276 |
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| gemma4:31b (short) | 661 | 41 | 292 |
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---
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## V100 caveat — why the numbers are degraded
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Mid-bakeoff I probed `GET /api/ps` on pve197 while the V100's Q8 MoE was
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loaded:
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```
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gemma4:26b-a4b-it-q8_0 size: 30.5 GB size_vram: 1.57 GB
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```
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**Only 1.57 GB of the 30.5 GB model is actually resident on the V100;**
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the other 28.9 GB is running on CPU via Ollama's CPU-offload fallback.
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`nvidia-smi` corroborated: 31,754 / 32,768 MiB used, 0 % utilization
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at probe time. That remaining ~29 GB of VRAM isn't free — it's held by
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the SDXL pipeline on CT 167 (claude-avatar + ai-visualizer).
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Impact on every V100 number in this doc:
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- `gemma4:26b` Q4_K_M is 18 GB — doesn't fit in the ~1 GB of headroom
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SDXL leaves, so it runs largely on CPU. Observed 8.3 tok/s is
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consistent with CPU inference of a MoE 26B Q4 model.
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- `gemma4:31b` Q4_K_M is 19.9 GB — same fate. Observed 1.55 tok/s is
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consistent with dense 31B on CPU (dense kills you on CPU; only
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~4 B params activate on the MoE, so the MoE suffers less).
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- The Q8 variant (28 GB) never had a chance on the V100 while SDXL is
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loaded. Bakeoff did not attempt it.
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**To get isolated V100 numbers**, stop SDXL on CT 167 (or stop CT 167
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entirely) and re-run `scripts/gpu-bakeoff/harness.py --host pve197`.
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Left as a follow-up — whether that's worth the ai-visualizer
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interruption is a judgment call. See "Open questions" below.
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| Model | 3090 Ti | Strix Halo |
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|-------|---------|------------|
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| gemma4:26b (short) | 2,063 | 1,276 |
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| gemma4:31b (short) | 661 | 292 |
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---
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@@ -162,10 +115,10 @@ smaller. For interactive chat this is decisive: Seth's `mort-bot`
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running `gemma4:26b` gets ~4.7× the responsiveness it would on
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`gemma4:31b`, even though the models are near-equal in total params.
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Why the ratio holds on every GPU: **memory bandwidth is the bottleneck**
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across all three cards. Strix gets 42 % of 3090 Ti on 26B and 39 % of
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3090 Ti on 31B — identical ratios — because it has ~25 % of the
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bandwidth and matches or exceeds proportionally.
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Why the ratio holds on both GPUs: **memory bandwidth is the bottleneck**
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on both cards. Strix gets 42 % of 3090 Ti on 26B and 39 % of 3090 Ti on
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31B — nearly identical ratios — because it has ~25 % of the bandwidth
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and matches or slightly exceeds proportionally.
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---
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@@ -176,44 +129,31 @@ bandwidth and matches or exceeds proportionally.
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comfortable for real-time responses.
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- Fallback: **Strix Halo** — 54 tok/s is usable. Benefit is unified
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memory can host larger models the 24 GB 3090 Ti can't.
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- Avoid: V100 *while SDXL is coresident.* Without SDXL it should be
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competitive.
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**Long-context / prompt-heavy workloads (prefill-heavy).**
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- Primary: **3090 Ti** again — 23,849 tok/s prefill means a
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500-token prompt ingests in ~21 ms.
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- Strix at 14,326 tok/s is ~35 ms — still interactive.
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**Running models that don't fit elsewhere.**
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- Strix Halo. Unified LPDDR5X can hold 80 GB+ models that 24 GB and
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32 GB discrete cards can't — at the cost of lower bandwidth.
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**Running models that don't fit on discrete cards.**
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- Strix Halo. Unified LPDDR5X can hold 80 GB+ models that a 24 GB
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3090 Ti can't — at the cost of lower bandwidth.
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- The largest model tested here (`gemma4:31b` Q4 at 19.9 GB) fits
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all three. Q8 variants (28 GB+) only fit the V100 and Strix.
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both. Q8 variants (28 GB+) only fit Strix in this matrix.
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**Fine-tuning / training.**
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- Not measured here. 3090 Ti's 24 GB limits batch size on 20 B+
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models; V100's 32 GB HBM2 is much more forgiving *if* isolated.
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models.
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---
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## Open questions / follow-ups
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1. **Isolated V100 re-run.** Stop SDXL, re-run the harness. Expected
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outcome: V100 decode lands between 3090 Ti and Strix (probably
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~70-90 tok/s on 26B given HBM2 bandwidth ~900 GB/s vs 3090 Ti's
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~1008 GB/s). That would settle the V100's actual rank.
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2. **V100 Q8 baseline.** `gemma4:26b-a4b-it-q8_0` (28 GB) is the Q8
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MoE variant Seth pulled on pve197 — worth measuring once isolated.
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Q8 vs Q4 quality/speed tradeoff for the same model would be useful.
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3. **Strix max-model fit.** Strix can probably host models that
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wouldn't fit the discrete cards. A follow-up would pull a larger
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model (70 B+ quantized) on matt-strix and see the Strix-only
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performance ceiling.
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4. **Contention behavior.** The V100 finding generalizes — whenever
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the homelab is running coresident AI workloads, Gemma 4 inference
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falls off a cliff. A "contention-aware routing" decision (don't
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send latency-sensitive Ollama traffic to a card with SDXL running)
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may be worth building into the mort-bot / openwebui gateway.
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1. **Strix max-model fit.** Strix can host models that wouldn't fit the
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3090 Ti. A follow-up would pull a larger model (70 B+ quantized) on
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matt-strix and measure the Strix-only performance ceiling.
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2. **Q8 vs Q4 on Strix.** Same model, two quantizations — quality/speed
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tradeoff characterization.
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---
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@@ -225,15 +165,10 @@ All per-run JSON traces are under `scripts/gpu-bakeoff/runs/`:
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runs/
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├── steel141/
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│ ├── gemma4-26b/{short,long}.json
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│ ├── gemma4-31b/{short,long}.json
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│ └── gemma4-26b-q8/{short,long}.json # skipped — model not on host
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├── pve197/
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│ ├── gemma4-26b/{short,long}.json # ⚠ degraded, see caveat
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│ └── gemma4-31b/{short,long}.json # ⚠ degraded, see caveat
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│ └── gemma4-31b/{short,long}.json
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└── matt-strix/
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├── gemma4-26b/{short,long}.json
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├── gemma4-31b/{short,long}.json
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└── gemma4-26b-q8/{short,long}.json # skipped — model not on host
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└── gemma4-31b/{short,long}.json
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```
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Each JSON contains the warmup call and all 3 measurement calls with
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